Search Results - "Su, Yu-Ti"

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  1. 1
    Layout Guidelines against Charging Damage from the Well-Side Antennas in Separated Power Domains

    Layout Guidelines against Charging Damage from the Well-Side Antennas in Separated Power Domains

    Kuo, Hsi-Yu, Chu, Yu-Lin, Dai, Hung-Da, Wang, Chun-Chi, Lin, Pei-Jung, Kuo, Shu-Cheng, Guo, Ethan, Zhang, Ya-Min, Su, Yu-Ti, Hsu, Chia-Lin, Chen, Kuan-Hung, Chen, Tsung-Yuan, Li, Te-Liang, Huang, Ray, Chen, Kuo-Ji, Song, Ming-Hsiang, Lu, Ryan, Xia, Kejun

    2024 IEEE International Reliability Physics Symposium (IRPS)

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  2. 2
    Protection Schemes for Plasma Induced Damage from Well-Side Antennas

    Protection Schemes for Plasma Induced Damage from Well-Side Antennas

    Kuo, Hsi-Yu, Chu, Yu-Lin, Dai, Hung-Da, Wang, Chun-Chi, Lin, Pei-Jung, Guo, Ethan, Su, Yu-Ti, Hsu, Chia-Lin, Chen, Kuan-Hung, Chen, Tsung-Yuan, Lu, Ryan, Liang, Victor, Chen, Kuo-Ji, Xia, Kejun

    2023 IEEE International Reliability Physics Symposium (IRPS)

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  3. 3
    CMOS Latch-up Improvement: Embedded Active Collector in FinFET Technology

    CMOS Latch-up Improvement: Embedded Active Collector in FinFET Technology

    Huang, Chien-Yao, Lin, Wun-Jie, Su, Yu-Ti, Lee, Jam-Wem, Chen, Kuo-Ji, Song, Ming-Hsiang

    2022 44th Annual EOS/ESD Symposium (EOS/ESD)

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  4. 4
    Low-Capacitance SCR for On-Chip ESD Protection with High CDM Tolerance in 7nm Bulk FinFET Technology

    Low-Capacitance SCR for On-Chip ESD Protection with High CDM Tolerance in 7nm Bulk FinFET Technology

    Peng, Po-Lin, Chu, Li-Wei, Tsai, Ming-Fu, Su, Yu-Ti, Lee, Jam-Wem, Chen, Kuo-Ji, Song, Ming-Hsiang

    2019 41st Annual EOS/ESD Symposium (EOS/ESD)

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  5. 5
    An Enhanced DNW-enclosed NMOS in FinFET Technology for Latch-up Improvement

    An Enhanced DNW-enclosed NMOS in FinFET Technology for Latch-up Improvement

    Huang, Chien-Yao, Su, Yu-Ti, Chen, Kuo-Ji, Song, Ming-Hsiang

    2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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  6. 6
    Deep N-well induced latch-up challenges in bulk FinFET technology

    Deep N-well induced latch-up challenges in bulk FinFET technology

    Huang, Chien-Yao, Su, Yu-Ti, Chang, Tzu-Heng, Hsu, Chia-Wei, Lee, Jam-Wem, Chen, Kuo-Ji, Song, Ming-Hsiang

    2017 39th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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  7. 7
    High CDM resistant low-cap SCR for 0.9V advanced CMOS technology

    High CDM resistant low-cap SCR for 0.9V advanced CMOS technology

    Su, Yu-Ti, Chang, Tzu-Heng, Tsai, Tsung-Che, Chu, Li-Wei, Tseng, Jen-Chou, Song, Ming-Hsiang

    2013 35th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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  8. 8
    A Hybrid Design Framework for Video Streaming in IEEE 802.11e Wireless Network

    A Hybrid Design Framework for Video Streaming in IEEE 802.11e Wireless Network

    Jang, Hung-Chin, Su, Yu-Ti

    2008 22nd IEEE International Conference on Advanced Information Networking and Applications (AINA)

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  9. 9
    FinFET SCR structure optimization for high-speed serial links ESD protection

    FinFET SCR structure optimization for high-speed serial links ESD protection

    Chu, Li-Wei, Chang, Yi-Feng, Su, Yu-Ti, Chen, Kuo-Ji, Song, Ming-Hsiang, Lee, Jam-Wem

    2016 IEEE International Reliability Physics Symposium (IRPS)

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