Search Results - "Xue, Cheng-Xin"

20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart Devices

Shih, Ming-En, Hsieh, Shih-Wei, Tsai, Ping-Yuan, Lin, Ming-Hung, Tsung, Pei-Kuei, Chang, En-Jui, Liang, Jenwei, Chang, Shu-Hsin, Huang, Chung-Lun, Nian, You-Yu, Wan, Zhe, Kumar, Sushil, Xue, Cheng-Xin, Jedhe, Gajanan, Fujiwara, Hidehiro, Mori, Haruki, Chen, Chih-Wei, Huang, Po-Hua, Juan, Chih-Feng, Chen, Chung-Yi, Lin, Tsung-Yao, Wang, Ch, Chen, Chih-Cheng, Jou, Kevin

2024 IEEE International Solid-State Circuits Conference (ISSCC)

7.6 A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation

Hsieh, Sung-En, Wei, Chun-Hao, Xue, Cheng-Xin, Lin, Hung-Wei, Tu, Wei-Hsuan, Chang, En-Jui, Yang, Kai-Taing, Chen, Po-Heng, Liao, Wei-Nan, Low, Li Lian, Lee, Chia-Da, Lu, Allen-CL, Liang, Jenwei, Cheng, Chih-Chung, Kang, Tzung-Hung

2023 IEEE International Solid-State Circuits Conference (ISSCC)

A 12nm 137 TOPS/W Digital Compute-In-Memory using Foundry 8T SRAM Bitcell supporting 16 Kernel Weight Sets for AI Edge Applications

Jedhe, Gajanan, Deshpande, Chetan, Kumar, Sushil, Xue, Cheng-Xin, Guo, Zijie, Garg, Ritesh, Jway, Kim Soon, Chang, En-Jui, Liang, Jenwei, Wan, Zhe, Pan, Zhenhao

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on Vision

Chang, En-Jui, Xue, Cheng-Xin, Deshpande, Chetan, Jedhe, Gajanan, Liang, Jenwei, Cheng, Chih-Chung, Lin, Hung-Wei, Lee, Chia-Da, Kumar, Sushil, Jway, Kim Soon, Guo, Zijie, Garg, Ritesh, Lu, Allen-Cl, Lin, Chien-Hung, Hsieh, Meng-Han, Lin, Tsung-Yao, Chen, Chih-Cheng

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

A 0.21V 40nm NAND-ROM for IoT Sensing Systems with Long Standby Periods

Wang, Jinn-Shyan, Xue, Cheng-Xin, Liu, Chien-Tung, Lin, Tay-Jyi

2020 IEEE International Symposium on Circuits and Systems (ISCAS)

16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices

Xue, Cheng-Xin, Hung, Je-Min, Kao, Hui-Yao, Huang, Yen-Hsiang, Huang, Sheng-Po, Chang, Fu-Chun, Chen, Peng, Liu, Ta-Wei, Jhang, Chuan-Jia, Su, Chin-I, Khwa, Win-San, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chih, Yu-Der, Chang, Tsung-Yung Jonathan, Chang, Meng-Fan

2021 IEEE International Solid-State Circuits Conference (ISSCC)

A 0.23V 40nm OAI-ROM with Low Active and Standby Power for AI-based IoT Edge Devices

Wang, Jinn-Shyan, Xue, Cheng-Xin, Liu, Chien-Tung, Lin, Tay-Jyi

2020 International Conference on Electronics, Information, and Communication (ICEIC)

Circuit Design Challenges in Computing-in-Memory for AI Edge Devices

Si, Xin, Xue, Cheng-Xin, Su, Jian-Wei, Zhang, Zhixiao, Li, Sih-Han, Sheu, Shyh-Shyuan, Lee, Heng-Yuan, Chen, Ping-Cheng, Wu, Huaqiang, Qian, He, Chang, Meng-Fan

2019 IEEE 13th International Conference on ASIC (ASICON)

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing

Liu, Qi, Gao, Bin, Yao, Peng, Wu, Dong, Chen, Junren, Pang, Yachuan, Zhang, Wenqiang, Liao, Yan, Xue, Cheng-Xin, Chen, Wei-Hao, Tang, Jianshi, Wang, Yu, Chang, Meng-Fan, Qian, He, Wu, Huaqiang

2020 IEEE International Solid-State Circuits Conference - (ISSCC)

13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices

Chang, Tung-Cheng, Chiu, Yen-Cheng, Lee, Chun-Ying, Hung, Je-Min, Chang, Kuang-Tang, Xue, Cheng-Xin, Wu, Ssu-Yen, Kao, Hui-Yao, Chen, Peng, Huang, Hsiao-Yu, Teng, Shih-Hsih, Chang, Meng-Fan

2020 IEEE International Solid-State Circuits Conference - (ISSCC)

15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

Xue, Cheng-Xin, Huang, Tsung-Yuan, Liu, Je-Syu, Chang, Ting-Wei, Kao, Hui-Yao, Wang, Jing-Hong, Liu, Ta-Wei, Wei, Shih-Ying, Huang, Sheng-Po, Wei, Wei-Chen, Chen, Yi-Ren, Hsu, Tzu-Hsiang, Chen, Yen-Kai, Lo, Yun-Chen, Wen, Tai-Hsing, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

2020 IEEE International Solid-State Circuits Conference - (ISSCC)

24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

Xue, Cheng-Xin, Chen, Wei-Hao, Liu, Je-Syu, Li, Jia-Fang, Lin, Wei-Yu, Lin, Wei-En, Wang, Jing-Hong, Wei, Wei-Chen, Chang, Ting-Wei, Chang, Tung-Cheng, Huang, Tsung-Yuan, Kao, Hui-Yao, Wei, Shih-Ying, Chiu, Yen-Cheng, Lee, Chun-Ying, Lo, Chung-Chuan, King, Ya-Chin, Lin, Chorng-Jung, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

2019 IEEE International Solid-State Circuits Conference - (ISSCC)

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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

Chen, Wei-Hao, Li, Kai-Xiang, Lin, Wei-Yu, Hsu, Kuo-Hsiang, Li, Pin-Yi, Yang, Cheng-Han, Xue, Cheng-Xin, Yang, En-Yu, Chen, Yen-Kai, Chang, Yun-Sheng, Hsu, Tzu-Hsiang, King, Ya-Chin, Lin, Chorng-Jung, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

2018 IEEE International Solid-State Circuits Conference - (ISSCC)

First Demonstration of Ultrafast Laser Annealed Monolithic 3D Gate-All-Around CMOS Logic and FeFET Memory with Near-Memory-Computing Macro

Hsueh, Fu-Kuo, Hung, Je-Min, Huang, Sheng-Po, Huang, Yen-Hsiang, Xue, Cheng-Xin, Shen, Chang-Hong, Shieh, Jia-Min, Chiu, Wen-Cheng, Lin, Chao-Cheng, Chen, Bo-Yuan, Liu, Szu-Ching, Chen, Shih-Wei, Niou, Deng-Yan, Huang, Wen-Hsien, Li, Kai-Shin, Lin, Kun-Kin, Chang, Da-Chiang, Chen, Kun-Ming, Huang, Guo-Wei, Pan, Ci-Ling, Chang, Meng-Fan, Hu, Chenming, Yeh, Wen-Kuan

2020 IEEE International Electron Devices Meeting (IEDM)

Monolithic 3D+-IC Based Massively Parallel Compute-in-Memory Macro for Accelerating Database and Machine Learning Primitives

Ramanathan, Akshay Krishna, Rangachar, Srivatsa Srinivasa, Hung, Je-Min, Lee, Chun-Ying, Xue, Cheng-Xin, Huang, Sheng-Po, Hsueh, Fu-Kuo, Shen, Chang-Hong, Shieh, Jia-Min, Yeh, Wen-Kuan, Ho, Mon-Shu, Govindarajan, Hariram Thirucherai, Sampson, Jack, Chang, Meng-Fan, Narayanan, Vijaykrishnan

2020 IEEE International Electron Devices Meeting (IEDM)

Challenges in Circuit Designs of Nonvolatile-memory based computing-in-memory for AI Edge Devices

Xue, Cheng-Xin, Chang, Meng-Fan

2019 International SoC Design Conference (ISOCC)

Monolithic 3D+ -IC based Reconfigurable Compute-in-Memory SRAM Macro

Srinivasa, Srivatsa, Tu, Yung-Ning, Si, Xin, Xue, Cheng-Xin, Lee, Chun-Ying, Hsueh, Fu-Kuo, Shen, Chane-Hone, Shieh, Jia-Min, Yeh, Wen-Kuan, Ramanathan, Akshay Krishna, Ho, Mon-Shu, Sampson, Jack, Chang, Meng-Fan, Narayanan, Vijaykrishnan

2019 Symposium on VLSI Technology

Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices

Tang, Kea-Tiong, Wei, Wei-Chen, Yeh, Zuo-Wei, Hsu, Tzu-Hsiang, Chiu, Yen-Cheng, Xue, Cheng-Xin, Kuo, Yu-Chun, We, Tai-Hsing, Ho, Mon-Shu, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Chang, Meng-Fan

2019 Symposium on VLSI Technology

A 28mn 320Kb TCAM Macro with Sub-0.8ns Search Time and 3.5+x Improvement in Delay-Area-Energy Product using Split-Controlled Single-Load 14T Cell

Xue, Cheng-Xin, Zhao, Wei-Cheng, Yang, Tzu-Hsien, Chen, Yi-Ju, Yamauchi, Hiroyuki, Chang, Meng-Fan

2018 IEEE Asian Solid-State Circuits Conference (A-SSCC)