APA-referens (7:e uppl.)

Das, S., Riedel, S., Naeim, M., Brunion, M., Bertuletti, M., Benini, L., . . . Milojevic, D. (2025). Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst., 33(2), 346. https://doi.org/10.1109/TVLSI.2024.3467148

Chicago-referens (17:e uppl.)

Das, S., et al. "Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst. 33, no. 2 (2025): 346. https://doi.org/10.1109/TVLSI.2024.3467148.

MLA-referens (9:e uppl.)

Das, S., et al. "Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, IEEE Trans. VLSI Syst., vol. 33, no. 2, 2025, p. 346, https://doi.org/10.1109/TVLSI.2024.3467148.

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